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Now construction of PA/VA only uses 56/39 bits.

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This commit is contained in:
Yifan Wu 2021-11-13 03:06:44 -08:00
parent fa38a39fd4
commit efc5e6b76c
1 changed files with 10 additions and 5 deletions
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15
os/src/mm/address.rs
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@ -2,6 +2,11 @@ use crate::config::{PAGE_SIZE, PAGE_SIZE_BITS};
use super::PageTableEntry; use super::PageTableEntry;
use core::fmt::{self, Debug, Formatter}; use core::fmt::{self, Debug, Formatter};
const PA_WIDTH_SV39: usize = 56;
const VA_WIDTH_SV39: usize = 39;
const PPN_WIDTH_SV39: usize = PA_WIDTH_SV39 - PAGE_SIZE_BITS;
const VPN_WIDTH_SV39: usize = VA_WIDTH_SV39 - PAGE_SIZE_BITS;
/// Definitions /// Definitions
#[repr(C)] #[repr(C)]
#[derive(Copy, Clone, Ord, PartialOrd, Eq, PartialEq)] #[derive(Copy, Clone, Ord, PartialOrd, Eq, PartialEq)]
@ -47,16 +52,16 @@ impl Debug for PhysPageNum {
/// usize -> T: usize.into() /// usize -> T: usize.into()
impl From<usize> for PhysAddr { impl From<usize> for PhysAddr {
fn from(v: usize) -> Self { Self(v) } fn from(v: usize) -> Self { Self(v & ( (1 << PA_WIDTH_SV39) - 1 )) }
} }
impl From<usize> for PhysPageNum { impl From<usize> for PhysPageNum {
fn from(v: usize) -> Self { Self(v) } fn from(v: usize) -> Self { Self(v & ( (1 << PPN_WIDTH_SV39) - 1 )) }
} }
impl From<usize> for VirtAddr { impl From<usize> for VirtAddr {
fn from(v: usize) -> Self { Self(v) } fn from(v: usize) -> Self { Self(v & ( (1 << VA_WIDTH_SV39) - 1 )) }
} }
impl From<usize> for VirtPageNum { impl From<usize> for VirtPageNum {
fn from(v: usize) -> Self { Self(v) } fn from(v: usize) -> Self { Self(v & ( (1 << VPN_WIDTH_SV39) - 1 )) }
} }
impl From<PhysAddr> for usize { impl From<PhysAddr> for usize {
fn from(v: PhysAddr) -> Self { v.0 } fn from(v: PhysAddr) -> Self { v.0 }
@ -206,4 +211,4 @@ impl<T> Iterator for SimpleRangeIterator<T> where
} }
} }
} }
pub type VPNRange = SimpleRange<VirtPageNum>; pub type VPNRange = SimpleRange<VirtPageNum>;